Computer Organisation and Architecture: From Logic Gates to Multicore Systems

Product Overview & Details

Computer Organisation and Architecture: From Logic Gates to Multicore Systems is a comprehensive and systematically organised text that explains how modern computers are built, controlled and optimised. Beginning with the essential principles of digital logic, the book develops the conceptual foundation required to understand processors, memories, input-output systems and high-performance computer architectures.

The opening chapters review truth tables, positive and negative logic, logic gates, encoders, decoders, multiplexers, demultiplexers, flip-flops, shift registers and counters. This is followed by a clear treatment of binary, octal and hexadecimal number systems, signed-number representation, fixed- and floating-point formats, character codes and the hardware implementation of binary arithmetic operations.

The discussion then moves from individual building blocks to the functional organisation of a complete computer. The stored-program concept, CPU structure, memory, instruction sets, instruction formats and register-transfer-level interpretation are explained alongside detailed coverage of the 8085 and 8086 microprocessors, memory and I/O interfacing, addressing modes, assembly-language programming and modern instruction-set architectures.

A dedicated treatment of control-unit design compares hardwired and microprogrammed approaches and connects them with RISC and CISC processor philosophies. The chapters on peripheral devices explain I/O subsystems, device interfaces, serial and parallel communication, programmed I/O, interrupt-driven transfer, DMA, privileged instructions, exceptions, process-state transitions and widely used interfaces such as SCSI and USB.

Memory organisation is developed through memory technologies, hierarchy, interleaving, cache mapping, block-size considerations, replacement algorithms, write policies and virtual memory. The final chapter introduces performance metrics, instruction pipelining, pipeline hazards, parallel processor architectures, advanced parallel-processing technologies and the practical challenges of multicore systems.

Numerous diagrams, worked illustrations, comparison tables, review questions and chapter-end self-assessment exercises strengthen understanding and support examination preparation. An extensive appendix broadens the coverage with Karnaugh maps, BCD adders, disk and SATA technologies, I/O processors, locality of reference, Moore's law, VLIW, superscalar and SMT processors, compiler techniques for instruction-level parallelism, and single-cycle and multi-cycle datapath design.